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We demonstrate the use of germanium (Ge) passivation in conjunction with a ZnO interlayer in a metal-interlayer-semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thin Ge passivation layer and a ZnO interlayer, passivating the GaAs surface and reducing the metal-induced gap states on the GaAs surface, respectively. The specific contact resistivity for the Ti/ZnO/Ge/n-GaAs (~2 × 10 18 cm -3 ) structure exhibits a ~1660× reduction compared to that of a Ti/n-GaAs structure. These results suggest that the proposed structure shows promise as a non-alloyed ohmic contact in high-electron-mobility transistors.Index Terms-Fermi level unpinning, gallium arsenide, germanium, specific contact resistivity, passivation I. INTRODUCTIONETEROSTRUCTURE-BASED devices such as high-electron mobility transistors (HEMTs) are in great demand for their high speed [1] and high voltage [2] applications. The ohmic contact within these devices must exhibit low contact resistance and smooth surface morphology for optimal performance. However, popular ohmic contact techniques for HEMTs (e.g., AuGe/Ni/Au for GaAs-based HEMTs [3] and Ti/Al/Ni/Au for ) are followed by high-temperature processes, leading to significant surface roughness. Poor surface morphology can be an obstacle for gate fabrication and degrade the reliability of the devices [3,4]. For this reason, non-alloyed ohmic contact technology has been essential for the improvement of HEMT performance.However, the Fermi level on the metal side is pinned to the charge neutrality level (CNL) of the semiconductor caused by metal-induced gap states (MIGS), leading to a higher Schottky

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