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Although near-threshold voltage (NTV) operation is an attractive means of achieving high energy efficiency, it can degrade the circuit stability of static random access memory (SRAM) cells. This paper proposes an NTV 7T SRAM cell in a 14 nm FinFET technology to eliminate read disturbance by disconnecting the path from the bit-line to the cross-coupled inverter pair using the transmission gate. In the proposed 7T SRAM cell, the halfselect issue is resolved, meaning that no write-back operation is required. A folded-column structure is applied to the proposed 7T SRAM cell to reduce the read access time and energy consumption. To reduce the standby power, the proposed 7T SRAM cell uses only a single bit-line for both read and write operations. To achieve proper "1" writing operation with a single bit-line, a two-phase approach is proposed. Compared to the conventional 8T SRAM cell, the proposed 7T SRAM cell improves the read access time, energy, and standby power by 13%, 42%, and 23%, respectively, with a 3% smaller cell area.Index Terms-FinFET, low-power design, near-threshold operation, single bit-line structure, SRAM cell. 1549-8328

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Although near-threshold (V th ) operation is an attractive method for energy and performance-constrained applications, it suffers from problems in terms of circuit stability, particularly, for static random access memory (SRAM) cells. This brief proposes a near-V th 9T SRAM cell implemented in a 22-nm FinFET technology. The read buffer of the proposed cell ensures read stability by decoupling the stored node from the read bit-line and improves read performance using a one-transistor read path. Energy and standby power are reduced by eliminating the sub-V th leakage current in the read buffer. For accurate sensing yield estimation, a new yield-estimation method is also proposed, which considers the dynamic trip voltage. The proposed SRAM cell can achieve a minimum operating voltage of 0.3 V.Index Terms-Fin-shaped field-effect transistor (FinFET), low-power design, near-threshold static random access memory (SRAM), single-ended sensing. 1063-8210