Electron beam induced deposition ͑EBID͒ and etching ͑EBIE͒ are promising methods for the fabrication of three-dimensional nanodevices, wiring of nanostructures, and repair of photolithographic masks. Here, we study simultaneous EBID and EBIE, and demonstrate an athermal electron flux controlled transition between material deposition and etching. The switching is observed when one of the processes has both a higher efficiency and a lower precursor partial pressure than the other. This is demonstrated in two technologically important systems: during XeF 2 -mediated etching of chrome on a photolithographic mask and during deposition and etching of carbonaceous films on a semiconductor surface. Simultaneous EBID and EBIE can be used to enhance the spatial localization of etch profiles. It plays a key role in reducing contamination buildup rates during low vacuum electron imaging and deposition of high purity nanostructures in the presence of oxygen-containing gases.
Electron beam induced deposition ͑EBID͒ and etching ͑EBIE͒ are promising methods for the fabrication of three-dimensional nanodevices, wiring of nanostructures, and repair of photolithographic masks. Here, we study simultaneous EBID and EBIE, and demonstrate an athermal electron flux controlled transition between material deposition and etching. The switching is observed when one of the processes has both a higher efficiency and a lower precursor partial pressure than the other. This is demonstrated in two technologically important systems: during XeF 2 -mediated etching of chrome on a photolithographic mask and during deposition and etching of carbonaceous films on a semiconductor surface. Simultaneous EBID and EBIE can be used to enhance the spatial localization of etch profiles. It plays a key role in reducing contamination buildup rates during low vacuum electron imaging and deposition of high purity nanostructures in the presence of oxygen-containing gases.
Circuit edit and failure analysis require tungsten deposition parameters to accomplish different goals. Circuit edit applications desire low resistivity values for rewiring, while failure analysis requires high deposition rates for capping layers. Tungsten deposition can be a well controlled process for a variety of beam parameters. For circuit edit, tungsten resistivity approaching below 150 µohm-cm and 50 μm3/nC is predicted. Material deposition rates of 80 μm3/nC can be achieved with reasonable pattern accuracy using defocus as a parameter.
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