The main goal in realizing aVLSI (analog VLSI)\ud systems able to mimic functionalities of biological neural networks is pointed to the reproduction of realistic synapses. Indeed,\ud because of the relative high synapse/neuron ratio, especially in\ud the case of extremely dense networks (i.e., reproduction of a real\ud scenario), synapses represent a considerable limitation in terms\ud of waste of silicon area and power consumption as well. Thanks\ud to advancement made in the implementation of memristor, the\ud interest in bio-inspired neural network design has been renewed.\ud Memristors have tunable resistance which depends on its past\ud state; this is analogous to the operating mode of biological\ud synapses. In this paper, we present the circuit implementation of\ud a simple memristor-based neural network. Here, we propose a\ud driving circuit model that not requires specific shape input pulses\ud to change the memristor conductance (i.e., synaptic strength), but\ud it can be driven by arbitrary shaped input pulses. Moreover, this\ud prototype circuit offers the chance of emulating the standard\ud STDP behavior allowing “controlled” changes for the synaptic\ud weights. Some preliminary experimental results are reported to\ud validate the proposed driving circui

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In this paper, the hardware implementation of a neuromorphic system is presented. This system is composed of a Leaky Integrate-and-Fire with Latency (LIFL) neuron and a Spike-Timing Dependent Plasticity (STDP) synapse. LIFL neuron model allows to encode more information than the common Integrate-and-Fire models, typically considered for neuromorphic implementations. In our system LIFL neuron is implemented using CMOS circuits while memristor is used for the implementation of the STDP synapse. A description of the entire circuit is provided. Finally, the capabilities of the proposed architecture have been evaluated by simulating a motif composed of three neurons and two synapses. The simulation results confirm the validity of the proposed system and its suitability for the design of more complex spiking neural networks

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A zinc oxide (ZnO)-reduced graphene oxide (rGO) composite thin film memristive device is reported. Further, it has been shown that it is possible to implement Hebbian learning rules like, the spiketiming-dependent plasticity, using this device. Furthermore, a circuit on PCB is developed; this circuit can imitate the biological spike firing scheme and activate the memristor synapse. The fabricated device along with the custom made circuit can be extended for developing future neuromorphic circuit applications.

An oxygen-rich ZnO-reduced graphene oxide (rGO) thin film was synthesized using a photo-annealing technique from zinc precursor (ZnO)–graphene oxide (GO) sol–gel solution. X-ray diffraction (XRD) results show a clear characteristic peak corresponding to rGO. The scanning electron microscope (SEM) image of the prepared thin film shows an evenly distributed wrinkled surface structure. Transition Metal Oxide (TMO)-based memristive devices are nominees for beyond CMOS Non-Volatile Memory (NVRAM) devices. The two-terminal Metal–TMO (Insulator)–Metal (MIM) memristive device is fabricated using a synthesized ZnO–rGO as an active layer on fluorine-doped tin oxide (FTO)-coated glass substrate. Aluminum (Al) is deposited as a top metal contact on the ZnO–rGO active layer to complete the device. Photo annealing was used to reduce the GO to rGO to make the proposed method suitable for fabricating ZnO–rGO thin-film devices on flexible substrates. The electrical characterization of the Al–ZnO–rGO–FTO device confirms the coexistence of memristive and memimpedance characteristics. The coexistence of memory resistance and memory impedance in the same device could be valuable for developing novel programmable analog filters and self-resonating circuits and systems.

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