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This paper describes the techniques that are used b y the C M Compiler Engine to map the fine-grained array parallelism of languages such as Fortran 90 and C* onto the Connection Machine architectures. The same compiler is used for node level programming of the CM-5, for global programming of the CM-5, and for global programming of the SIMD CM-2.A new compiler phase is used to generate two classes of output code: code for a scalar control processor, which executes SPARC assembler, and code targetted at a model of the CM-5's parallel processing elements. The model is embodied in a new RISC-like vector instruction set called PEAC. The P E A C code is later assembled into SPARC code that invokes the VLIW assembly language instructionsof the processor nodes' vector units.The control program distributes parallel (array) data at runtime among the processor nodes of the target machine. Each of these nodes is itself superpipelined and superscalar. A n innovative scheduler overlaps the execution of multiple P E A C operations, while conventional vector processing techniques keep the pipelines filled.

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