This paper presents an efficient VLSI architecture of JPEG2000 encoder that has high performance with low hardware complexity. The proposed architecture performs RPA(Recursive Pyramid Algorithm) based 2-D lifting DWT operations with the reduction of processing elements and bit-plane parallel EBCOT(Embedded Block Coded with Optimized Truncation) operations using one bit-plane coder and binary arithmetic coder per two bit-planes. Together with multi-level processing of DWT, it conducts multi-level EBCOT operations as soon as M lines of each wavelet subband are available, where M is column size of code block. As a result, it can have fast computation time and reduce memory requirement.0-7803-9197-7/05/$20.00
This paper presents an efficient processor architecture which constructed by filter bank or liftimg scheme for real time processing of separable 2-D discrete wavelet transform(DWT). To achieve high efficiency, we use partitioning algorithm based on the state space representation technique and RPA-like scheme. As a result, the architecture can reduce critical path by the state space implementation. And it has smaller hardware resources compared to that of other architectures with comparable throughput by improvement of hardware utilization.
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