The session deals with the techniques that improve performance and lowers power in both over sampled and Nyquist ADC's.Discrete time delta sigma modulators perform well but require antialiased inputs. Continuous time modulators do not require antialiasing and are low power, but suffer from time constant variation. The first paper presents a hybrid architecture that employs a combination of discrete and continuous time over sampled techniques. RC time constant variation of the continuous time modulator is calibrated and jitter insensitive techniques are demonstrated for an audio application.The second paper demonstrates a power efficient approach to wideband delta sigma ADC design. Third order noise shaping is achieved using only 2 integrators Opamps typically are the major consumers of power in discrete time delta sigma ADC's and dynamic biasing of amplifiers can help to reduce this power. The 3rd paper describes a wideband delta sigma ADC implemented with dynamically biased amplifiers that achieves higher bandwidth and lower distortion than previous work.Multistage Noise Shaping (MASH) has been previously shown to have superior stability for high order modulators but require high accuracy integrators. The fourth paper demonstrates a new MASH architecture that retains its stability properties but can now be built with low gain opamps, a substantial advantage in deep submicron processes.The fifth paper is a tutorial on low power ADC and technology scaling trends. It also discusses the impact of digital logic to help improve performance while lowering power dissipation.The next 2 papers present low power techniques for high resolution ADC's.The sixth paper presents a calibrated 16 bit ADC using time constant control to lower power dissipation.The last paper demonstrates a power-efficient pipelined high-resolution ADC that employs non-slewing closed-loop amplifiers.
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