As a formal modeling and analysis method, colored petri nets (CPN) fits to construct formal model for software/hardware system with lots of communication and parallel/synchronous sharing behavior. Then behavior analysis of system function and performance based on the CPN model can be unfolded to verify the system feasibility. The CPN model of a kind of new CMP architecture shared multi-channel L2 Cache (AUMCC) is constructed in this article. Processing simulating of instruction set is deeply penetrated on the AUMCC CPN model, and analysis based on simulating results well verifies the feasibility of AUMCC architecture.
A kind of shared multi-channel on-chip memory architecture (SMC-OCM) for embedded CMPs is proposed in this article. To implement SMC-OCM architecture, the sharable multi-channel on-chip memory (MC-OCM) is designed and implemented based on FPGA. The characteristic of multiple data channel of MC-OCM assures good parallel responsiveness of SMC-OCM system. Experiments showed that the access latency of SMC-OCM is lower than that of the-state-of arts. SMC-OCM architecture satisfies the performance requirements for memory system by embedded applications
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.