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One micron gate-length LDD-CMOS (Lightly DopedDrain -Complementary Metal Oxide Semiconductor) technology uses N and P-MOSFETs, realized on the same substrate, in a way to benefit simultaneously from a combination of their characteristics. Some regions of these transistors like the Wells and the Source/Drain are created by a reliable technique called ion implantation. The aim of this paper is to simulate the ion implantation steps included in the LDD-CMOS 1 micron process which has been acquired by CDTA ( Centre for Development of Advanced Technologies) from ISiT (Fraunhofer-Institut für Siliziumtechnologie). The process simulation framework ATHENA of the TCAD (Technology Computer Aided Design) SILVACO's software was employed to simulate our process and extract some process technology parameters, such as P+ and N+ doping concentrations as well as the ion implantation energies and doses, and the corresponding junction depths.

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