Abstract. The development and validation of fault-tolerant computers for critical realtime applications are currently both costly and time-consuming. Often, the underlying technology is out-of-date by the time the computers are ready for deployment. Obsolescence can become a chronic problem when the systems in which they are embedded have lifetimes of several decades. This paper gives an overview of the work carried out in a project that is tackling the issues of cost and rapid obsolescence by defining a generic fault-tolerant computer architecture based essentially on commercial off-the-shelf (COTS) components (both processor hardware boards and real-time operating systems). The architecture uses a limited number of specific, but generic, hardware and software components to implement an architecture that can be configured along three dimensions: redundant channels, redundant lanes and integrity levels. The two dimensions of physical redundancy allow the definition of a wide variety of instances with different fault-tolerance strategies. The integrity level dimension allows application components of different levels of criticality to co-exist in the same instance. The paper describes the main concepts of the architecture, the supporting environments for development and validation, and the prototypes currently being implemented.
In this paper, we present the DIANA experiment on the use of Java in avionics safety critical applications. First, we discuss some concerns about the porting of the Java platform on the ARINC 653 operating system. Then the paper focuses on some important features of the Safety Critical Java Technology adopted in the project. Particular attention is turned on the Java memory model which is stack-based as opposed to the ongoing JSR-302 memory regions model. Benefits and issues of this approach are discussed through a real use case implementation representing part of a Flight Warning System.
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