In order to correct non-linearities due to High Power Amplifiers (HPA) operating near saturation in telecommunication transceivers, a new adaptive predistortion system based on analog Neural Networks (NNs) was developed. Based on size, consumption and bandwidth considerations, Multi-Layer Perceptron (MLP) type NNs were implemented in a 0.6 µm CMOS ASIC. The NNs parameters are digitally updated with a computer, depending on simulation conditions (temperature drifts, ageing variations). The interface between the analog part and the software updating system is integrated in an analog-digital PCB including a FPGA, 6 analog-to-digital converters and 62 digital-to-analog converters. This paper describes the realization of each part of the breadboard system and presents experimental validation results of the whole predistortion module.
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