The piezoelectric flextensional actuator investigated in this paper comprises three pre-stressed piezoceramic lead zirconate titanate (PZT) stacks and an external, flexure-hinged, mechanical amplifier configuration. An electromechanical model is used to relate the electrical and mechanical domains, comprising the PZT stacks and the flexure mechanism, with the dynamic characteristics of the latter represented by a multiple degree-of-freedom dynamic model. The Maxwell resistive capacitive model is used to describe the nonlinear relationship between charge and voltage within the PZT stacks. The actuator model parameters and the electromechanical couplings of the PZT stacks, which describe the energy transfer between the electrical and mechanical domains, are experimentally identified without disassembling the embedded piezoceramic stacks. To verify the electromechanical model, displacement and frequency experiments are performed. There was good agreement between modelled and experimental results, with less than 1.5% displacement error. This work outlines a general process by which other pre-stressed piezoelectric flextensional actuators can be characterized, modelled and identified in a non-destructive way.
The production of silicon substrates for integrated circuits continues to set standards in levels of precision form and finish tolerances required of surface generation processes. Extreme tolerances are specified for a range of parameters such as total thickness variation, global and local planarity, and surface finish over substrate dimensions of up to 300mm in diameter (current-generation silicon wafer). These tolerances are related to the ‘design rule’ for each generation of microprocessor and memory unit. The economic and technological environment of an industry that demands such precision is reviewed. The general production process is then described with particular reference to surface grinding as an enabling technology. The context of developments in ultraprecision machine tool technology is delineated, requirements for assuring the indicated tolerances are set out and machine solutions representing the ‘state-of-the-art’ and ‘next-generation’ machine technologies reported.
We are rapidly moving into the new era of digitisation, into an era of the Massive Internet of Things -towards the Gigabit Society and towards 5G Technology. The implications are truly far reaching. Rapid transformation through the implementation of INDUSTRY 4.0 is becoming visible in industries all over the world. Disruption to the more traditional industrial practices and processes is inevitable. High Performance Cutting is no exception. Developments in the Internet of Things (IoT) opens up new and extremely powerful capabilities to help us gain a significantly deeper understanding of the fundamentals of cutting processes and offers entirely new connectivity possibilities at all interfaces, some old and some new, "between the Chip Root and the Cloud". This supports us in our attempts since the foundation of CIRP in 1951 to remove technological roadblocks and can lead on a new journey towards new and unprecedented scientific/technological developments as well as new business models for companies involved in the various elements of the supply chain for cutting processes (DIN 8580). "Performance" will take on a new and unanticipated meaning over what was originally meant when we established this CIRP-HPC Conference back in the early 2000's. In this paper a critical review of a previous roadmap is undertaken for cutting processes presented in a CIRP Keynote Paper in 2003 by Byrne, Dornfeld and Denkena [1] and new thoughts and ideas are presented on a vision for a 2020 skeleton Roadmap for High Performance Cutting in the new age of Digitisation.
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