This analog-to-digital converter digitizes a radio signal at a 10.7MHz intermediate frequency (IF) using integrated quadrature mixing and Σ∆ modulation. Figure 20.4.1 shows a block diagram of a highlyintegrated AM/FM radio receiver. The IF A/D conversion and digital filtering, demodulation and further signal processing can be integrated on a single CMOS IC [1]. The radio front-end mixes both AM and FM signals to 10.7MHz IF, so that the A/D conversion is shared. A single channel filter is used, selecting one 200kHz FM channel. For AM, over 20 channels pass through this filter, resulting in high dynamic range of the IF signal. When the radio is tuned to a weak AM radio station, strong neighboring channels should not introduce disturbance of the weak signal. This multi-channel aspect for AM puts severe requirements on the automatic gain control (AGC) amplifier and A/D converter in terms of noise, intermodulation and crossmodulation distortion.The digitization in Figure 20.4.1 may be performed by a wide-band A/D converter. 10b resolution in 11MHz bandwidth may be sufficient to achieve the noise specifications. However, linearity requirements for AM are hard to meet at the 10.7MHz input frequency. Alternatively, bandpass Σ∆ modulation may be used, providing the required resolution in the bandwidth of interest only [1,2,3]. Still, its input stage must be linear at the 10.7MHz IF to prevent intermodulation of neighboring channels in AM-mode.This circuit uses a low-power method for A/D conversion of the relatively small bandwidth at the IF as shown in Figure 20.4.2. Passive mixers implemented with switches at the virtual ground input nodes of continuous-time Σ∆ A/D converters provide quadrature signals I and Q. The power consumption of these mixers is negligible, and high linearity can be obtained since the switches are only weakly modulated [4]. To be insensitive to DC offset and flicker noise, the input signals are mixed to a 165kHz offset frequency rather than to DC, allowing a maximum frequency deviation of ±150kHz in FM mode. The continuous-time low-pass Σ∆ modulators digitize the low-frequency quadrature mixer outputs. The associated high-frequency components are removed by the inherent lowpass filtering of such modulators. The complex digital decimation filter has 300kHz bandwidth and also performs the final frequency shift to DC. Thus, an A/D converter is implemented with IF input and filtered digital baseband output.Both sampling and mixer local oscillator frequencies require high accuracy and low jitter. These frequencies are chosen so they can be derived from a single 42.14MHz master clock frequency generated by an on-chip crystal oscillator. To mix the 10.7MHz IF input to the 165kHz offset frequency, 10.535MHz mixing frequency is used, which is one quarter of the master clock frequency. A 658kHz Nyquist sampling rate is used for digitization of the 300kHz input signal band centered at 165kHz. An oversampling ratio of 32 yields 21.07MHz sampling rate, which is half the master clock rate.Mismatch in I and Q sig...
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CMOS OTA for programmable HF filters is presented. When used in an OTA-C integrator, the unity-gain frequency phase error remains less than 0.3" for frequencies up to more than one tenth of the OTA bandwidth. Since this phase error is preserved over the C,,, range of the OTA, the OTA is suitable for filters with a programmable transfer function.
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