The paper presents a graphical blockdiagram based programming tool, which is a new software development system for digital signal processing (DSP). This system provides a blockdiagram editor; therefore, the DSP system can be easily built by connecting functional blocks as described in the signal-flow graph. A block library is set up, which includes basic signal processing functions and some frequently used high level signal processing functions like FIR, IIR, FFT, etc. A friendly graphic user interface (GUI) based on the 'X-Window' system is developed to support each design step. Users can then improve their design easily according to the GUI's response. To guarantee the correctness of the circuits designed, the debugging and verifying capabilities are embedded in our system. The full system is combined with a structural silicon compiler, which we developed previously. Several designs will be illustrated as examples. It has been shown that this tool will be suitable for DSP system design by using a silicon compiler. We will ascertain the features from these tools and add some specific features of DSP circuit to create our system for DSPJASIC chip design.Since the goal is to use a block-diagram as input description of DSP circuits, we should develop some tools to deal with the block-diagram operation for a DSP circuit. These tools include the block-diagram editor, block-diagram syntax checker and graphic compiler. In designing these tools the significant problem encountered is how to operate these block-diagrams efficiently and friendly on the screen. Therefore, we devise a special data structure effective in editing, debugging and compiling.The graphid entry will be translated into C-like behavioral description language and/or 'design specification behavioral description language' (DSL), which was developed by our group. The system flow chart and data flow chart of our graphic designed environment are shown in Fig. la and b. Finally, the synthesised data is transferred to TSP format, the input description of Genesil, before the chip layout can be obtained.
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