In this paper, we show an alignment strategy based on a hybrid strategy using cross correlation and line-scan alignment to address the challenge for CMOS integrated circuit postprocessing using electron-beam lithography. Due to design rules imposed by the foundries at the 130 nm node and below, classical line-scan alignment is not possible, and marker shapes are limited. The shape of the marker is essential for cross-correlation alignment. By measuring accurately the alignment offset between two lithography steps with different marker shapes compatible with the design rules, we tested the influence of the marker shape in the performance of the cross-correlation alignment. We present a method based on a white noise generated array to design high-performance markers for cross correlation, compatible with CMOS technology, by increasing the sharpness of their autocorrelation peak. We show that the alignment performances can even be improved using a hybrid strategy with cross-correlation and line-scan alignment and reaches a mean offset of 5.2 nm on a CMOS substrate.
Current quantum systems based on spin qubits are controlled by classical electronics located outside the cryostat. This approach creates a major wiring bottleneck, which is one of the main roadblocks toward scalable quantum computers. Thus, we propose a scalable memristor-based programmable dc source that can perform biasing of quantum dots (QDs) inside the cryostat. This novel cryogenic approach would enable to control the applied voltage on the electrostatic gates by program-Manuscript
In this paper, we present a novel method to perform grayscale electron-beam lithography on multilayer stacks where the pattern transfer is done in a single plasma etching step. Due to the differences in material etch rates in the stack, the shape of the resist after development vs the shape of the multilayer stack after etching is significantly different. To be able to reach the desired shape in the multilayer stack, the final resist dose is defined by an etching calibration curve that describes the relationship between the electron-beam dose and the remaining materials thickness after plasma etching. With this method, a resistive memory crossbar array is fabricated with a height resolution of 10 nm and nanoscale dimension devices.
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