In the modern wireless communication system, digital technology has tremendous growth, and all the communication channels are slowly moving towards digital form. Wireless communication has to provide the reliable and efficient transfer of information between transmitter and receiver over a wireless channel. The channel coding technique is the best practical approach to delivering reliable communication for the end-users. Many conventional encoder and decoder units are used as error detection and correction codes in the digital communication system to overcome the multiple transient errors. The proposed convolutional encoder consists of both Recursive Systematic Convolutional (RSC) Encoder and Adaptive Variable-Rate Convolutional (AVRC) encoder. Adaptive Variable-Rate Convolutional encoder improves the bit error rate performance and is more suitable for a power-constrained wireless system to transfer the data. Recursive Systematic Convolutional encoder also reduces the bit error rate and improves the throughput by employing the trellis termination strategy. Here, AVRC encoder ultimately acquires the channel state information and feeds the data into a fixed rate convolutional encoder and rate adaptor followed by a buffer device. A hybrid encoder combines the AVRC encoder and RSC encoder output serially and parallel, producing the solid encoded data for the modulator in the communication system. A modified turbo code is also obtained by placing interleaver between the two encoder units and building the stronger code word for the system. Finally, the conventional encoder system is compared and analyzed with the proposed method regarding the number of LUT’s, gates, clock cycle, slices, area, power, bit error rate, and throughput.
Viterbi decoder is considered as one of the widespread error correcting channel decoder of communication devices. The Viterbi decoder is mainly used for decoding the convolution codes. The large amount of trellis transitions increases the computational complexity of the Viterbi decoder. In this paper, the finite state machine based trellis encoding is proposed in the convolutional encoder for minimizing the system complexity. Moreover, the folding transformation is proposed in the Viterbi decoder for minimizing the number of stages processed while decoding the encoded data bits. The main objective of this proposed system is that the reconstruction of original data bits with less errors. The performance of the proposed system is analyzed in terms of number of slice LUT, number of slice register, BRAM, delay and failure rate. In addition, the performance of the proposed method is evaluated with the duplication with comparison based protection method. The amount of slice registers utilized in the proposed system are 739 for Virtex 5, it is less when compared to the duplication with comparison based protection method.
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