We introduce new features for the broad phase algorithm sweep and prune that increase scalability for large virtual reality environments and allow for efficient AABB insertion and removal to support dynamic object creation and destruction. We introduce a novel segmented interval list structure that allows AABB insertion and removal without requiring a full sort of the axes. This algorithm is well-suited to large environments in which many objects are not moving at once. We analyze and test implementations of sweep and prune that include subdivision, batch insertion and removal, and segmented interval lists. Our tests show these techniques provide higher performance than previous sweep and prune methods, and perform better than octrees in temporally coherent environments.

SUMMARYLarge virtual environments with many interactive objects pose high processing overhead for physics simulation and require real-time results. Most of these objects are not being interacted with at the same time, leaving many in physical equilibrium. Modern physics simulation software eliminates some work for the case of objects at rest, but these objects still pose overhead because of potential activation during processing, which can constitute the majority of running time for some environments. We present a physics software design that eliminates overhead associated with bodies at rest, reducing the remaining running time to be proportional to the number of objects being interacted with. Our design consists of specific broad phase collision detection, contact group generation, and object storage methods, as well as intermediate structures and interfacing methods within the physics pipeline. It can be combined with various narrow phase collision detection, constraint solving, and integration techniques, as well as methods of parallelism. We show that our system produces a running time independent of the number of objects at rest, and that our methods compare favorably with published methods and available physics software when simulating environments with many objects at rest.

In this paper we present a low-power tag organization for physically tagged caches in embedded processors with virtual memory support. An exceedingly small subset of tag bits is identified for each application hot-spot so that only these tag bits are used for cache access with no perfromance sacrifice as they provide complete address resolution. The minimal subset of physical tag bits, i.e. the compressed tag, is dynamically updated following the changes in the physical address space of the application. Special support from the operating system (OS) is introduced in order to maintain the compressed tag during program execution. The compressed tag is updated by the OS to match the current set of physical memory pages allocated to the application. We have proposed efficient algorithms that are incorporated within the memory allocator and the dynamic linker in order to achieve dynamic update of the compressed tags in the cases where the mapping between virtual and physical addresses is modified; such cases include memory allocation/deallocation and swapping physical pages on the secondary memory storage. The only hardware support needed within the I/D-caches is the support for disabling bitlines of the tag arrays. An extensive set of experimental results demonstrates the efficacy of the proposed approach.

No abstract