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Ahrrocr -Ultra-thin gate diclcctrics are exploited in fabrication of MOSFETs featuring channel lengths in the decananometer range: the ITRS [I] indicates that oxide thickness in the order of I nm will be used in 2005 for ultra-shon CMOS. For such aggressively scaled devices, gate-leakage currents represent a critical issue. In this paper, a study on the impact of Direct-Tunneling (DT) current on the behaviour of a wide variety of CMOS circuiis is presented, based on a simulation strategy aimcd at prudicting the correlation of major performance indices with oxide thickness.