Phenomena of electromagnetic compatibility (EMC) have to be c onsidered during layout synthesis of printedcircuit boards (PCBs), in order to design failsafe and highperformance systems. In this paper the PCB routingsystem HERO, presented i n a p r evious publication, i s extended by a new layer-assignment/net-ordering phase, called midway routing, p erformed after global and before detailed r outing. The new method yields a signicantly increased c ompletion rate, improved EMC{behavior, and fewer layer changes (vias) in about half the time of the previous version of HERO.
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