In the framework of the GigaBit Transceiver project (GBT), a prototype, the GBTSerDes ASIC, was developed, fabricated and tested. To sustain high radiation doses while operating at 4.8Gb/s, the ASIC was fabricated in a commercial 130 nm CMOS technology employing radiation tolerant techniques and circuits. The transceiver serializes-deserializes the data, ReedSolomon encodes and decodes the data and scrambles and descrambles the data for transmission over optical fibre links. This paper describes the GBT-SerDes architecture, and presents the test results.

This paper presents the development of the GBTX radiation hard ASIC test bench. Developed for the LHC accelerator upgrade programs, the GBTX implements a bidirectional 4.8 Gb/s link between the radiation hard on-detector custom electronics and the off-detector systems. The test bench was used for functional testing of the GBTX and to evaluate its performance in a radiation environment, by conducting Total Ionizing Dose and Single-Event Upsets tests campaigns.

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The structure of the CMS inner tracking system has been studied using nuclear interactions of hadrons striking its material. Data from proton-proton collisions at a center-of-mass energy of 13 TeV recorded in 2015 at the LHC are used to reconstruct millions of secondary vertices from these nuclear interactions. Precise positions of the beam pipe and the inner tracking system elements, such as the pixel detector support tube, and barrel pixel detector inner shield and support rails, are determined using these vertices. These measurements are important for detector simulations, detector upgrades, and to identify any changes in the positions of inactive elements.

The Versatile Link Demonstrator Board (VLDB) is the evaluation kit for the radiationhard Optical Link ecosystem, which provides a 4.8 Gbps data transfer link for communication between front-end (FE) and back-end (BE) of the High Energy Physics experiments. It gathers the Versatile link main radiation-hard custom Application-Specific Integrated Circuits (ASICs) and modules: GBTx, GBT-SCA and VTRx/VTTx plus the FeastMP, a radiation-hard in-house designed DC-DC converter. This board is the first design allowing system-level tests of the Link with a complete interconnection of the constitutive components, allowing data acquisition, control and monitoring of FE devices with the GBT-SCA pair. K: Detector control systems (detector and experiment monitoring and slow-control systems, architecture, hardware, algorithms, databases); Digital electronic circuits; Radiation-hard electronics 1Corresponding author.