Multilevel inverters (MLIs) are an imperative solution for high power and high voltage applications. The MLIs can be classified into two categories such as symmetric and asymmetric. The asymmetric type MLIs has large number of output voltage steps with less number of input DC voltage sources and switching devices. In this paper, a single phase asymmetric (trinary sequence DC source) Cascaded H-Bridge MLI has been developed using unipolar PWM control schemes. The topology can produce 27-level output voltage with the help of 12 switches and 3 DC sources. It has been examined with a diverse combination of multicarrier unipolar PWM control. The PWM control includes Phase Disposition (PDPWM), Alternative Opposition Disposition (APODPWM), Carrier overlapping (COPWM), and Variable Frequency (VFPWM). The harmonic content of output voltage for each technique has been observed with different modulation indices. The demonstration of proposed topology for generating 27-level output voltage has been tested through simulation in MATLAB-SIMULINK and verified with laboratory-based experimental setup. From the results, it is evident that the APODPWM offers quality output voltage with relatively low harmonic distortion. Also, it has been observed that COPWM performance is superior since it delivers relatively higher fundamental RMS output voltage.

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Asymmetric three-phase cascading Trinary-DC source Multilevel Inverter which can achieve reduced harmonics and superior root mean square (RMS) values of the output voltage is proposed. This topology can achieve cascaded full bridge inverter operation with dissimilar (unequal) DC Source and it is fired by using variable frequency pulse with modulation technique as a switching strategy. This pulse width modulation switching strategy has a newly adopted multicarrier single reference technique. The performance parameter factors like Form Factor (FF), Crest Factor (CF), Total Harmonic Distortion (THD) and fundamental RMS output voltage (V RMS) are estimated by using proposed asymmetrical three-phase cascading multilevel inverter for several modulation indices (0.8-1). The research study carries with MATLAB/SIMULINK based simulation and experimental results obtained using appropriate prototype (test board) to prove the viability of the proposed concept.

In this paer, the suggested topologies are gained by cascading a full bridge inverter with dissimilar DC sources. This topology has a several new patterns adopting the fixed switching frequency, multicarrier control freedom degree with mixture conceptions are established and simulated for the preferred three-phase cascaded multilevel inverter. In outstanding switching arrangement terminations, there are convinced degrees of freedom to produce the nine level AC output voltages with terminated switching positions for producing altered output voltages. These investigations focus on asymmetrical cascaded multilevel inverter engaging with carrier overlapping pulse width modulation (PWM) topologies. These topologies offer less amount of harmonics present in the output voltage and superior root mean square (RMS) values of the output voltages associated with the traditional sinusoidal pulse width modulation. This research studies carries with it MATLAB/SIMULINK based simulation and experimental results obtained using appropriated prototype to prove the validity of the proposed concept.