An integrated transceiver for broadband wirelinenetworks is presented. The transceiver includes a receive data path, a transmit data path, and auxiliary functions including serial port interface, clock and reference generation blocks, and voltage regulator control circuitry. The receive data path provides constant input impedance and is composed of two variable gain amplifier (VGA) blocks, a n analog Q-pole filter, a 12-bit analog-to-digital converter ( A D C ) sampling at 32MHz, and a digital high-pass filter. The transmit data path contains digital interpolation filters and a 12-bit digital-to-analog converter (DAC) sampling at 128MHz. The chip was implemented in doublepoly triple-metal 0.35pm CMOS technology. Measured performance f o r both receive and transmit data paths meets target specifications with n o noticeable crosstalk. 7-2-1 0-7803-6591-7/01/$10.00 0 2001 IEEE IEEE 2001 CUSTOM INTEGRATED CIRCUITS CONFERENCE
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