The properties of n‐GaP/p‐Si interface as well as their influence on solar cell performance are studied for GaP layers grown by low‐temperature (380 °C) plasma‐enhanced atomic layer deposition (PE‐ALD). The influence of different plasma treatments and RF power values are explored. The increase of RF power leads to a growth transition from amorphous (a‐GaP) to microcrystalline GaP (μc‐GaP) with either amorphous‐GaP/Si or epitaxial‐GaP/Si interface, respectively. However, when continuous hydrogen plasma is used the amorphous‐GaP/Si interface exhibits better photovoltaic performance compared to the epitaxial one. Values of open circuit voltage, Voc = 0.45–0.55 V and internal quantum efficiencies, IQE > 0.9 are obtained for amorphous‐GaP/Si interfaces compared to Voc = 0.25–0.35 V and IQE < 0.45 for epitaxial‐GaP/Si interfaces. According to admittance spectroscopy and TEM studies the near‐surface (30–50 nm) area of the Si substrate is damaged during growth with high RF power of hydrogen plasma. A hole trap at the level of EV + (0.33 ± 0.02) eV is detected by admittance spectroscopy in this damaged Si area. The damage of Si is not observed by TEM when the deposition of the structures with epitaxial‐GaP/Si interface is realized by a modified process without hydrogen plasma indicating that the damage of the near‐surface area of Si is related to hydrogen plasma interaction.
An approach for epitaxial growth of GaP layers on Si substrates at low temperature (380°C) by plasma-enhanced atomic layer deposition (PEALD) is explored. A significant improvement of the crystalline properties of the GaP layers is obtained using additional in-situ Ar plasma treatment. The epitaxial growth for the first 20-30 nm of GaP on Si is demonstrated from transmission electron microscopy. Moreover, the use of in-situ Ar plasma treatment during the PEALD process allows one to increase the growth rate per cycle from 0.9±0.1 Å/cycle to 1.9±0.1 Å/cycle and reduce the RMS roughness from 3.76 nm to 1.88 nm. The effect of Ar plasma treatment on the electronic properties of the GaP/Si interface is studied by deep level transient spectroscopy (DLTS). A defect level at (0.33±0.03) eV below the conduction band is observed in the subsurface layer of Si for the GaP/Si structure grown under Ar plasma treatment. However, the defect response observed by DLTS vanishes after rapid thermal annealing at 500 ºC in nitrogen ambient.
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A method to obtain vertically aligned silicon structures with a high aspect ratio, which are interesting for photovoltaics, using nanosphere lithography and cryogenic plasma etching is explored. For the conventional nanosphere lithography, the etching of the latex spheres during the cryogenic plasma process limits the maximum ratio of Si wire length to the diameter at the level of 5:1. The maximum length of 2–3 μm can be obtained for Si wires with 0.45 μm diameter. An intermediate step of SiO2 hard mask formation before nanosphere lithography is proposed to increase the maximum length. The nanosphere lithography with the predeposited SiO2 layer allows to increase the maximum length/diameter ratio to at least 15:1. An array of Si wires with a diameter of 0.45 μm and a length of 6 μm is obtained on the entire surface of 4 in. Si wafers.
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