This letter presents a low-power frequency quintupler fabricated through a TSMC 90 nm CMOS process. By forming a sub-harmonic mixer and a cross-coupled pair in a cascoded topology, the proposed circuit provided the five-time output frequency and consumed less dc power than a conventional circuit. The cross-coupled pair also enhanced the power level of the 4 harmonics so that the quintupler obtained good conversion gain. The measured results revealed that the quintupler had a 3 db frequency range of 23.6 to 25.5 GHz and a maximum conversion gain of 2.2 dB at a low input power of . The dc power consumption in the quintupler core and the output buffer are 1.3 and 34 mW, respectively.Index Terms-Cascode, CMOS, frequency quintupler, harmonic-enhanced, low power, sub-harmonic mixer.
A novel 180 hybrid with two sections of three-conductor coupled-line structure inhered different operating frequencies with overlapped characteristic and perfect isolation between the -port and -port is employed to implement a Ka-to M-band single-balanced subharmonic mixer (SHM) in a 0.15-m GaAs pHEMT process with a compact die size of less than 0.82 0.83 mm . The thorough analysis based on the scattering matrix of the 180 hybrid is also presented. Incorporating the inherent features of the 180 hybrid with an antiparallel diode pair configuration, the proposed SHM achieved a wide operating bandwidth from 37 to 85 GHz with low conversion loss from 9 to 14 dB, enhanced local oscillation (LO)-to-RF isolation and 2LO-to-RF isolation under 10-dBm LO power level. This proposed architecture is really attractive to SHM design in modern millimeter-wave territory.
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