Miniaturization and portable devices have reshaped the electronic device landscape, emphasizing the importance of high performance while maintaining energy efficiency to ensure long battery life. FinFET and Tunnel-FET technologies have emerged as attractive alternatives to overcome the limitations of supply voltage scaling for ultra-low power applications. This work compares the performance of 10 nm FinFET- and TFET-based digital circuits from basic logic gates up to an 8k gates low-power microprocessor. When compared with their FinFET-based counterparts, the TFET-based logic gates have lower leakage power when operated below 300 mV, show higher input capacitance, and exhibit a reduced propagation delay under different fan-in and fan-out conditions. Our comparative study was extended to the synthesis of an MSP-430 microprocessor through standard cell libraries built particularly for this work. It is demonstrated that the TFET-based synthesized circuits operating at ultra-low voltages achieve a higher performance in terms of speed at the cost of increased power consumption. When the speed requirements are relaxed, the TFET-based designs are the most energy-efficient alternative. It is concluded that the TFET is an optimal solution for ultra-low voltage design.
The trade-offs of the Tunnel-FETs (TFETs) in terms of delay, energy per cycle, and noise margin are compared with 10 nm FinFETs for a wide voltage supply ranging from 200 to 600 mV with a specific focus on the ultra-low voltage domain. A calibration process is carried out to ensure the same off-current and extrinsic capacitance in both devices. The TFETs presented a high advantage in terms of delay as well as a penalty in energy consumed. As a result, the TFET circuits show a better Energy-Delay trade-off in voltages as low as 350 mV. This is explained by a larger capacitance caused by the nature of the intrinsic materials chosen of the device modelling.
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