This paper designs an advanced circuit for multilevel inverter. The topology of the design is an asymmetric cascaded multilevel inverter based on switched capacitor. The technique of switch-capacitor inverter using series/parallel conversion (SCISPC) was developed to reduce the number of switches. In the design, the three different DC voltage sources and the capacitor connected to the circuit could be adjusted to increase the output voltage, eliminating the need for additional DC source, and, work with the diode-clamped switch arrangement, to reduce the voltage stress on each switch. To verify its performance, the proposed design was subjected to a Matlab simulation, and a fast Fourier transform analysis on the percentage of total harmonic distortion produced by the design. In addition, a hardware prototype of our design was prepared, and its operations were studied in details. The results show that our design has an edge over the other multilevel inverter topology, as it produced lower harmonics and made better use of lower circuit components.
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