Scaling down effects on conduction and low frequency noise characteristics are investigated in a set of p-type polycrystalline silicon thin-film transistors (poly-Si TFTs) with fixed channel width (W=8 μm) and different channel lengths (L=2, 4, 8, 12, and 20 μm). First, short channel effects on threshold voltage, field effect mobility, and sub-threshold swing are examined, while the presence of contact may induce to the degradation of field effect mobility in the short channel devices. Subsequently, the drain current noise power spectral densities are measured at varied effective gate voltages and drain currents. The slopes of normalized noise against effective gate voltage are varied from −1.1 to −2 with decreasing channel length, which indicates that poly-Si TFTs varied from bulk dominated devices to interface dominated devices. Based on N-μ model, the flat-band voltage noise spectral density and coulomb scattering coefficient are extracted. Therefore, measured normalized noises are simulated by considering of contact resistance. Finally, short channel effects on some noise parameters (such as Hooge's parameter, etc.) are studied and discussed.
A bottom gate a-Si:H thin fii transistor (TFT) with tetraethooxysihme @EOS) oxide as a gate insulator has been made for the first time. TEOS oxide film of 2000~has high breakdown strength as twice as the SiNx film of 2000~prepared by plasma enhanced chemical vapor deposition (PECVD). A proper thickness combination of SiNx / TEOS oxide double layer for the high production yield will be discusse& And the characteristics of a-Si:H TFT fabricated with SiNx / TEOS oxide will be presented. The pixel charging properties and the Qvalues of the SiNx / TEOS oxide double layered a-Si:H TFT-LCD will be compared with those Of the SiNx/~@3 double layered a-Si:H TFT-LCD by panel simulation.
The instability of p-channel low-temperature polycrystalline silicon thin film transistors (poly-Si TFTs) is investigated under negative gate bias stress (NBS) in this work. Firstly, a series of negative bias stress experiments is performed, the significant degradation behaviors in current–voltage characteristics are observed. As the stress voltage decreases from −25 V to −37 V, the threshold voltage and the sub-threshold swing each show a continuous shift, which is induced by gate oxide trapped charges or interface state. Furthermore, low frequency noise (LFN) values in poly-Si TFTs are measured before and after negative bias stress. The flat-band voltage spectral density is extracted, and the trap concentration located near the Si/SiO2 interface is also calculated. Finally, the degradation mechanism is discussed based on the current–voltage and LFN results in poly-Si TFTs under NBS, finding out that Si–OH bonds may be broken and form Si* and negative charge OH− under negative bias stress, which is demonstrated by the proposed negative charge generation model.
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