The CMOS transceiver IC exploits the superheterodyne architecture to implement a low-cost RF front-end with an auto-calibration function for IEEE 802.11g. The transceiver supports gain and phase mismatch auto tuning mechanisms at both the transmitting and receiving ends, which are able to reduce the phase mismatch to within 1 and gain mismatch to 0.1 dB. Implemented in a 0.25 m CMOS process with 2.7 V supply voltage, the transceiver delivers a 5.1 dB receiver cascade noise figure, 7 dBm transmit, and a 1 dB compression point.
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