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The five-level hybrid clamped inverter (5L-HC) is a promising new topology for medium-voltage applications. However, to minimize the capacitors and ensure good performance of the converter, capacitor voltage ripples, as well as voltage balancing control, need further study. Based on carrierphase-shift PWM (CPS-PWM), this paper gives a rigorous analysis of the ripple characteristics of all the capacitors (which consist of three groups: the flying capacitors, the central dc capacitor, and the upper and lower dc capacitors) under both normal and unbalanced operating conditions. The results can serve as a guide for the optimal design of the capacitors. First, as for the balancing issue, a self-balancing mechanism of the central dc capacitor, which is similar to the better-known self-balancing feature of the flying capacitors, is revealed. Then, a new voltage balancing strategy is proposed for these two groups of capacitors to cope with disturbances arising from various nonideal factors. For the upper and lower dc capacitors, which suffer from intrinsic imbalance, this paper proposes a better method to calculate the optimal zero-sequence voltage (ZSV), which is to be injected to achieve the balancing objective. In this paper, the ripple analysis and balancing strategy proposed are verified with simulations and experiments. INDEX TERMS Five-level hybrid clamped inverter (5L-HC), capacitor voltage ripples, voltage balancing, ripple suppression.

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This paper explores the mechanism for the harmonic voltage measurement error (HVME) of a capacitor voltage transformer (CVT) in a comprehensive way and develops a practical error correction method to improve the harmonic measurement performance of a CVT. The harmonic equivalent circuit (HEC) of CVTs with different types of dampers are established and the parameter value calculation methods of the circuit elements are presented. Characteristics of the individual inherent resonance mode of the HEC, including the resonant frequency, the resonant type and the circuit elements involved, are analyzed systematically. Centered on resonance mode formulation, an universal error correction method for CVTs in measuring harmonic voltage is proposed based on the piecewise fitting of the transformation ratio. A physical experimental platform available for low-voltage CVTs is developed in laboratory, which utilizes a 10-kV harmonic generator and a step-up transformer to provide harmonic signals with high voltage level. Moreover, a novel experimental scheme for testing the HVME of high-voltage CVTs is proposed based on alternating current/direct current (AC/DC) filters. Experiments are conducted on these experimental platforms to test the HVME of a 35-kV CVT in laboratory and a 525-kV CVT in a back-to-back DC converter station. The experimental results verify the validity of the built HECs of CVTs, the resonant mode analysis results and the resonant frequency calculation method. Finally, the effectiveness of the proposed harmonic error correction method is proved by several examples.

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In this work, we propose an all-dielectric frequency selective surface (FSS) composed of periodically placed highpermittivity dielectric resonators and a three-dimensional (3D) printed supporter. Mie resonances in the dielectric resonators offer strong electric and magnetic dipoles, quadrupoles, and higher order terms. The re-radiated electric and magnetic fields by these multipoles interact with the incident fields, which leads to total reflection or total transmission in some special frequency bands. The measured results of the fabricated FSS demonstrate a stopband fractional bandwidth (FBW) of 22.2%, which is consistent with the simulated result.

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