Conventional machine vision systems suffer from great data latency and energy consumption in cognitive tasks due to the separated vision sensors, memory units, and processors. In‐sensor computing based on optoelectronic synapses allows efficient computation by directly sensing and processing optical signals. Herein, an optoelectronic synapse based on Au/ZnO:N/IGZO/TiN structure is proposed. It shows uniform optical SET and electrical RESET behaviors, with various light‐tunable plasticity. Furthermore, a 4‐bit reservoir is experimentally implemented on the device, which is ideal to construct in‐sensor reservoir computing (RC) system. By converting spatiotemporal optical signals to higher dimensional feature space, in‐sensor RC has a great advantage in processing sequential visual information. Simulation results demonstrate that the in‐sensor RC system based on the proposed synapse achieves a considerable recognition accuracy (90.45%) for the MNIST dataset with very limited 36‐30‐10 perceptron network, and a 97.14% accuracy for human action classification from sequential vision data based on the Weizmann dataset. This work proves the low training cost and great efficiency for processing spatiotemporal and sequential optical signals, which may pave a new way for future machine vision applications.
Memristor-based neuromorphic computing shows great potential for high speed and high throughput signal processing applications, such as electroencephalogram (EEG) signal processing. Nonetheless, the size of 1T1R memristors arrays is limited by the non-ideality of the devices, which prevents the hardware implementation of large and complex networks. In this work, we propose the Depthwise Separable Convolution and Bidirectional Gate Recurrent Unit (DSC-BiGRU) Network, a lightweight and highly robust hybrid neural network based on 1T1R arrays, which enables efficient processing of EEG signals in the temporal, frequency and spatial domains by hybridizing DSC and BiGRU blocks. The network size is reduced and network robustness is improved while ensuring network classification accuracy. In the simulation, the measured non-idealities of the 1T1R array are brought into the network through statistical analysis. Compared to traditional convolutional networks, the network parameters are reduced by 95% and the network classification accuracy is improved by 21% at 95% array yield rate and 5% tolerable error. This work demonstrates that lightweight and highly robust networks based on memristor arrays hold great promise for applications that rely on low consumption and high efficiency.
The human visual system plays the most important role in information perception. Inspired by its structure and processing mechanism, novel optoelectronic memristor‐based artificial visual systems have emerged, thanks to the advantages of time latency and energy efficiency. However, the established systems lack a complete hardware supporting system to demonstrate the potential of large‐scale integration. Herein for the first time, a gate multiplexing architecture for optical signal sensor and memory integration is proposed, which can achieve multivalue storage of 3‐bit optical signal in the analog domain. Based on this novel structure, an artificial visual sensor and memory system (AVSMS) is implemented with a 5 × 6 photodiode array, an I/V conversion circuit, and a 32 × 32 1T1R memristor array for image sensor and memory integration. Furthermore, a parallel pipeline storage strategy is proposed to enable AVSMS to store 32 images with a size of 5 × 6 pixels and 3‐bit grayscale without erasing operation and achieve an ideal frame rate of more than 60 000 frames per second for high‐speed storage. Experimental results demonstrate that AVSMS can directly eliminate repeated background information in sequential images through peripheral hardware circuitry. The AVSMS provides a promising hardware solution for large‐scale image sensor and memory integration in artificial visual systems.
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