In recent years, experimental demonstration of ferroelectric tunnel junctions (FTJ) based on perovskite tunnel barriers has been reported. However, integrating these perovskite materials into conventional silicon memory technology remains challenging due to their lack of compatibility with the complementary metal oxide semiconductor process (CMOS). This communication reports the fabrication of an FTJ based on a CMOS-compatible tunnel barrier HfZrO (6 unit cells thick) on an equally CMOS-compatible TiN electrode. Analysis of the FTJ by grazing angle incidence X-ray diffraction confirmed the formation of the noncentrosymmetric orthorhombic phase (Pbc2, ferroelectric phase). The FTJ characterization is followed by the reconstruction of the electrostatic potential profile in the as-grown TiN/HfZrO/Pt heterostructure. A direct tunneling current model across a trapezoidal barrier was used to correlate the electronic and electrical properties of our FTJ devices. The good agreement between the experimental and theoretical model attests to the tunneling electroresistance effect (TER) in our FTJ device. A TER ratio of ∼15 was calculated for the present FTJ device at low read voltage (+0.2 V). This study suggests that HfZrO is a promising candidate for integration into conventional Si memory technology.

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The present work reports the fabrication of a ferroelectric tunnel junction based on a CMOS compatible 2.8 nm-thick Hf0.5Zr0.5O2 tunnel barrier. It presents a comprehensive study of the electronic properties of the Pt/Hf0.5Zr0.5O2/Pt system by X-ray photoelectron and UV-Visible spectroscopies. Furthermore, two different scanning probe techniques (Piezoresponse Force Microscopy and conductive-AFM) were used to demonstrate the ferroelectric behavior of the ultrathin Hf0.5Zr0.5O2 layer as well as the typical current-voltage characteristic of a ferroelectric tunnel junction device. Finally, a direct tunneling model across symmetric barriers was used to correlate electronic and electric transport properties of the ferroelectric tunnel junction system, demonstrating a large tunnel electroresistance effect with a tunneling electroresistance effect ratio of 20.

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