A CMOS current-mode analog multiplier/divider circuit is presented. It is suited to standard CMOS fabrication and can be successfully employed in a wide range of analog signal processing applications. Measurement results for a 0.5 lm CMOS test chip prototype verify the approach employed. The circuit consumes 120 lW using a single supply voltage of 1.5 V and requires a silicon area of 150 9 140 lm.
A compact transconductor based on transistors operating in the triode region is presented. A novel V-I conversion stage made up of current dividers is proposed. The circuit allows tunability by adjusting a dc current and the transconductance is independent of transconductance parameter of the triode transistors. Besides, the circuit is simple because feedback structures to fix source-drain voltages of triode transistors are not needed, saving area and featuring low power consumption. Measurement and simulation results are presented and analyzed for validating the proposed technique.
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