This paper presents the methodology for redistribution layer (RDL) design of a communication Coherent Receiver block. The analysis focuses on the dualinput traces of the receiver for crosstalk mitigation between this block and a local aggressor. Interaction between Die/Package/Test-board is also discussed.Full-wave simulations show excellent correlation in electrical performance up to 6GHz. The measured trace-to-trace isolation for the integrated solution is reported to be close to -40dB at 2.7 GHz.
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