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The wider bandgap AlGaN (Eg > 3.4 eV) channel-based high electron mobility transistors (HEMTs) are more effective for high voltage operation. High critical electric field and high saturation velocity are the major advantages of AlGaN channel HEMTs, which push the power electronics to a greater operating regime. In this article, we present the DC characteristics of 0.8 µm gate length (LG) and 1 µm gate-drain distance (LGD) AlGaN channel-based high electron mobility transistors (HEMTs) on ultra-wide bandgap β-Ga2O3 Substrate. The β-Ga2O3 substrate is cost-effective, available in large wafer size and has low lattice mismatch (0 to 2.4%) with AlGaN alloys compared to conventional SiC and Si substrates. A physics-based numerical simulation was performed to investigate the DC characteristics of the HEMTs. The proposed HEMT exhibits sheet charge density (ns) of 1.05 × 1013 cm−2, a peak on-state drain current (IDS) of 1.35 A/mm, DC transconductance (gm) of 277 mS/mm. The ultra-wide bandgap AlGaN channel HEMT on β-Ga2O3 substrate with conventional rectangular gate structure showed 244 V off-state breakdown voltage (VBR) and field plate gate device showed 350 V. The AlGaN channel HEMTs on β-Ga2O3 substrate showed an excellent performance in ION/IOFF and VBR. The high performance of the proposed HEMTs on β-Ga2O3 substrate is suitable for future portable power converters, automotive, and avionics applications.

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Summary A new basic unit of 25‐level asymmetric multilevel inverter topology is proposed in this article. The extended and cascaded topologies are developed to increase the output voltage level. Furthermore, to determine the magnitude of DC source values in each unit, two algorithms are presented. The proposed extended and cascaded structures are compared with other recent and conventional multilevel inverter topologies in terms of a number of DC sources, blocking voltage on the switches and cost of the inverter. The performance of the proposed topology is validated through the MATLAB/Simulink tool and laboratory setup for 25‐level output. The dynamic performances of proposed topology is confirmed with different loading conditions and their results are presented.

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