Flip Chip (FC) packaging is gaining acceptance in the electronics packaging arena. More sources of bumped die and high density printed wiring boards (PWB's) laminates become available every day. Also, known good die (KGD) issues are being resolved by several companies. And, design tools to perform FCpackaging design are becoming more available. This is the infrastructure FCpackaging requires to become the packaging method of choice, specially for ? 200 Y O applications. FCpackages come in a variety of styles, FCplastic ball grid arrays (FC/PBGA k), FCplastic quad flat packs (FCPQFP'S), etc. Presently, the industry's drive is towards single chip packages on low cost laminates i.e. organic substrates. Work is starting to occur in the area of multi chip FCpackages, due to the need to increase memoty to microprocessor speed communication. In this article, we will discuss a unique FCMCM-L package. Part 1 will concentrate on the development and reliability testing of a one to four chip leadless FCMCM-L package. Unlike traditional surface mount (SM) components, that are attached to printed wiring boards (PWB's) with leads, the SMpads within the body of thepackage are used for attachment to a PWB. Collapsible eutectic solder domes are deposited on the SMpads by traditional screen printing. Afer refow, these domes are used to connect the FCMCM-L to the PWB. Challenges encountered during package design, PWB fabrication, first and second level assembly will be discussed, Part 2 of this article will focus on the extension of this FCMCM-L package to a BGA second level interconnect. Change of FC attachment method, design enhancements, assembly and reliability testing results will be presented.
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