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The properties of GaAs and InP Schottky diodes having nanometer-sized metal dots were investigated in order to clarify whether or not strong Fermi level pinning is an intrinsic property of the metal–semiconductor interface. Macroscopic Schottky diode samples having many nanometer-sized metal dots as well as single-dot Schottky diode samples were prepared by an in situ electrochemical process which consisted of pulsed anodic etching of the semiconductors followed by subsequent dc or pulsed cathodic deposition of the metal. Strong Fermi level pinning was not seen in the GaAs and InP macroscopic samples. The Schottky barrier height SBH values were strongly dependent on the metal work function and on the electrochemical processing conditions. Of particular interest, the difference in the dot size changed the SBH almost 340 meV in Pt/InP macroscopic Schottky diodes, indicating that Fermi level pinning disappears as the dot size is sufficiently reduced. X-ray photoelectron spectroscopy and Raman measurements indicated that these interfaces are oxide and stress free. Use of an atomic force microscope with a conductive probe allowed direct I–V measurements on single-dot samples. The metal work function and dot size dependencies of the SBHs in these samples were similar to those in macroscopic samples. Large ideality factors observed in the single-dot sample were explained in terms of environmental Fermi level pinning which produces a saddle point potential. The metal work function dependence of the SBHs measured as well as the relationship between the SBH and the ideality factor were both far from what was found in recent predictions based on the metal-induced gap state model. All the experimental results were consistently explained by the disorder-induced gap state model which asserts that strong Fermi level pinning is an extrinsic property of the metal–semiconductor interface.

Using voltammetry, X-ray photoemission spectroscopy (XPS), in situ electrochemical scanning tunneling microscopy (STM), ex situ atomic force microscopy (AFM) and scanning electron microscope (SEM) measurements, electrochemical etching modes for n-InP surfaces were investigated and optimized for uniform and controlled etching in an HCl electrolyte. The voltammograms indicated the presence of active and passive regions. The surfaces obtained in the active region were clean and featureless with an rms roughness of 1.8 nm. On the other hand, the oxide covered surfaces obtained in the passive region were nonuniform and porous. Etching characteristics of the d.c. photo-anodic mode and the pulsed avalanche mode were then investigated and compared. Both modes were found to be highly controllable and produced uniform and clean surfaces, consuming eight holes per molecule of InP. In particular, the pulsed avalanche etching mode realized an extremely high etch rate of 3x10 -5 nm/pulse.KEYWORD: InP, etching, electrochemical process, voltammetry, scanned probe microscope IntroductionScaling down of device feature size to the nanometer order is a recent general trend, not only for Si devices, but also for III-V devices. Thus, the etching process, the spatial uniformity and the precise controllability of the etching depth along with minimal process-induced damages have become increasingly important. Owing to its low damage nature, wet etching in various acid solutions 1) is widely used in various steps of InP and related material fabrication. However, precise control of the etching depth is extremely difficult in wet etching, because the etch rate is very sensitive to the temperature and the local fluctuation of the etchant composition.On the other hand, electrochemical etching appears to be promising for achieving high controllability, since the anodic reaction can be precisely controlled by the amount of charge according to Faraday's law of electrolysis. However, it is not clear at present whether it is possible to perform uniform and controlled etching of n-InP by the electrochemical reactions on InP surfaces in the electrolyte. In the literature, only limited works 2-5) have been reported on the anodic etching of InP, and their etch rate and uniformity have not been clarified. More recent anodization experiments 6-9) on InP using HCl electrolyte have led to the formation of InP porous structures. Although such an anodization mode is interesting for the formation of quantum structures and photonic crystals, it is not suitable for uniform etching. On the other hand, it has also been recently shown by our group that electrochemical etching applied just before electrodeposition is effective for the realization of well-behaved Schottky diodes with oxide-free, stress-free and pinning free interfaces for InP 10) . Similar results have been reported for n-GaAs Schottky contacts 11) . However, the mechanism, the etch uniformity and the etch rate of such a predeposition etching process have not been clarified yet.The purpose...

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Attempts were made to form regular arrays of size-and position-controlled Pt-dots on GaAs and InP by combining an in situ electrochemical process with the electron beam (EB) lithography. This utilizes the precipitation of Pt nano-particles at the initial stage of electrodeposition. First, electrochemical conditions were optimized in the mode of self-assembled dot array formation on unpatterned substrates. Minimum in-plane dot diameters of 22 nm and 26 nm on GaAs and InP, respectively, were obtained under the optimal pulsed mode. Then, Pt dots were selectively formed on patterned substrates with open circular windows formed by EB lithography, thereby realizing dot-position control. The Pt dot was found to have been deposited at the center of each open window, and the in-plane diameter of the dot could be controlled by the number, width and period of the pulse-waveform applied to substrates. A minimum diameter of 20 nm was realized in windows with a diameter of 100 nm, using a single pulse. Current-voltage (I-V) measurements using an atomic force microscopy (AFM) system with a conductive probe indicated that each Pt dot/n-GaAs contact possessed a high Schottky barrier height of about 1 eV.