High Performance Fortran (HPF) has emerged as a standardlanguage fordata parallel computing. However, awide variety of scientific applications are best programmed by a combination of task and data parallelism. Therefore, a good model of taak parallelism is important for continued success of HPF for parallel progr amrning. This paper presents a taak parallelism model that is simple, elegant, and relatively easy to implement in an HPF environment. Task parallelism is exploited by mechanisms for dividing processors into subgroups and mapping computations and data onto processor subgroups. This model of taak parallelism has been implemented in the Fx compiler at Carnegie Mellon University. The paper addresses the main issues in compiling integrated task and data parallel programs and reports on the use of this model for programming various flat and nested task structures. Performance results are presented for a set of programs spanning signal processing, image processing, computer vision and environment modeling. A vaxiant of this task model is a new approved extension of HPF and this paper offers insight into the power of expression and ease of implementation of this extension.
High Performance Fortran (HPF) has emerged as a standardlanguage fordata parallel computing. However, awide variety of scientific applications are best programmed by a combination of task and data parallelism. Therefore, a good model of taak parallelism is important for continued success of HPF for parallel progr amrning. This paper presents a taak parallelism model that is simple, elegant, and relatively easy to implement in an HPF environment. Task parallelism is exploited by mechanisms for dividing processors into subgroups and mapping computations and data onto processor subgroups. This model of taak parallelism has been implemented in the Fx compiler at Carnegie Mellon University. The paper addresses the main issues in compiling integrated task and data parallel programs and reports on the use of this model for programming various flat and nested task structures. Performance results are presented for a set of programs spanning signal processing, image processing, computer vision and environment modeling. A vaxiant of this task model is a new approved extension of HPF and this paper offers insight into the power of expression and ease of implementation of this extension.
With the increasing complexity of protocol and circuit designs, formal verification has become an important resewch area and binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. This paper presents a parallel algorithm for BDD construction targeted at shared memory multiprocessors and distributed shared memory systems.This algorithm focuses on improving memory access locality through specialized memory managers and partial breadth-first expansion, and on improving processor utilization through dynamic load balancing. The results on a shared memory system show speedups of over two on four processors and speedups of up to four on eight processors. The measured results clearly identify the main source of bottlenecks and point out some intereeting directions for further improvements.
With the increasing complexity of protocol and circuit designs, formal verification has become an important resewch area and binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. This paper presents a parallel algorithm for BDD construction targeted at shared memory multiprocessors and distributed shared memory systems.This algorithm focuses on improving memory access locality through specialized memory managers and partial breadth-first expansion, and on improving processor utilization through dynamic load balancing. The results on a shared memory system show speedups of over two on four processors and speedups of up to four on eight processors. The measured results clearly identify the main source of bottlenecks and point out some intereeting directions for further improvements.
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