HfS is one of the emerging transition metal dichalcogenides and is very promising for low-power nanoelectronics and high-sensitivity optoelectronic device applications. We studied the band structures of 1T-HfS with different thicknesses by first principles simulation, and the impact of different metal contacts to the HfS device performance has been experimentally studied. Back-gate and top-gate HfS field-effect transistors (FETs) were fabricated, and better electrical characteristics have been achieved with the FETs with the Ti/Au contact as compared with the Pt-contacted FETs. Thin layers of Pt and Ti/Au films were deposited on HfS flakes to investigate the metal/HfS interface by using scanning electron microscopy, atomic force microscopy, and Raman spectroscopy. A smoother Ti/Au film was formed on HfS, resulting in higher carrier injection and transport efficiency. The phonon behavior being dominated by the interface chemical bonding at the Ti/Au contact region has been confirmed with the more sensitive A phonon mode from the bilayer HfS.
Two-dimensional (2D) semiconductors are thought to belong to the most promising candidates for future nanoelectronic applications, due to their unique advantages and capability in continuing the downscaling of complementary metal-oxide-semiconductor (CMOS) devices while retaining decent mobility. Recently, optoelectronic devices based on novel synthetic 2D semiconductors have been reported, exhibiting comparable performance to the traditional solid-state devices. This review briefly describes the development of the growth of 2D crystals for applications in optoelectronics, including photodetectors, light-emitting diodes (LEDs), and solar cells. Such atomically thin materials with promising optoelectronic properties are very attractive for future advanced transparent optoelectronics as well as flexible and wearable/portable electronic devices.
With the continuous scaling down of devices, traditional one-transistor one-capacitor dynamic random access memory (1T-1C DRAM) has encountered great challenges originated from the large-volume capacitor and high leakage current. A semi-floating gate transistor has been proposed as a capacitor-less memory with ultrafast speed and silicon-compatible technology. In this work, a U-shaped semi-floating gate memory with strain technology has been demonstrated through TCAD simulation. Ultra-high operation speed on a timescale of 5 ns at low operation voltages (≤ 2.0 V) has been obtained. And the tensile stress induced in its channel region by using contact etch stop layer (Si3N4 capper layer) was found to significantly improve the drain current by 12.07%. Furthermore, this device demonstrated a favorable retention performance with a retention time over 1 s, and its immunity to disturbance from bit-line has also been investigated that could maintain data under the continuous worst writing disturbance operation over 10 ms.
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