Pulsed laser thermal annealing at the nanosecond timescale was successfully introduced into semiconductor devices manufacturing in the late 2000s for high volume manufacturing of sensitive 3D architectures such as vertical Si-based Insulated Gate Bipolar Transistors, SiC-based vertical power diodes and backside illuminated CMOS imaging sensors. It is now on the verge of being integrated in key annealing process steps in next generation CMOS and memory devices manufacturing. This invited paper presents recent experimental and simulation work involving sub-µs laser annealing for a wide range of applications, from contact formation to material modification and 3D sequential integration.
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