A dense and fast threshold-logic gate with a very high fan-in capacity is described. The gate performs sum-ofproduct and thresholding operations in an architecture comprising a poly-to-poly capacitor array and an inverter chain. The Boolean function performed by the gate is soft programmable. This is accomplished by adjusting the threshold with a dc voltage. Essentially, the operation is dynamic and thus, requires periodic reset. However, the gate can evaluate multiple input vectors in between two successive reset phases because evaluation is nondestructive. Asynchronous operation is, therefore, possible. The paper presents an electrical analysis of the gate, identifies its limitations, and describes a test chip containing four different gates of fan-in 30, 62, 127, and 255. Experimental results confirming proper functionality in all these gates are given, and applications in arithmetic and logic function blocks are described.

Sampled-analog circuit techniques are exploited in an application-specific integrated fuzzy controller design. A circuit library comprising a sample-and-hold amplifier, positive and negative ramp amplifiers, an inference cell, adder, and weighted adder amplifiers, and a divider unit was developed for this purpose. Any expert system of piecewise linear input membership functions, conjunctive rules and singleton output classes can be implemented with this library. The library was implemented in a 1.2 m double-metal double-poly CMOS technology. Test results indicate excellent linearity and accuracy in full 5-V railto-rail operation in all units. A controller of four inputs, 16 rules, and two outputs fabricated with these library units occupies 1.76 mm 2 silicon. Test results indicate full functionality. The measured speed, 85 k samples per second, is limited by the unbuffered outputs. Sampling rate can be increased by 50% in those applications where pipelining is permissible. Index Terms-Controller, sampled analog. I. INTRODUCTION F UZZY logic has been developed over the past three decades into a widely applied technique in classification and control engineering. This logic can be implemented in one of the following forms: 1) software simulation, which is highly cost effective if volume production is not demanded, and neither portability nor processing speed is critical; 2) microprocessor or microcontroller implementation, which is most suitable for low-volume production of slow but portable systems; 3) using a field-programmable or reconfigurable fuzzy processor chip, which offers high speed to portable systems in low-volume production; 4) using an application-specific (ASIC) fuzzy processor chip, which offers high speed in a cost-effective way for portable systems in high-volume production [1]. Quite obviously, the last two of these implementation styles require fuzzy-specific chip design. Indeed, numerous simulated or partially integrated architectures have been proposed in the past decade to fulfill this need [2]-[12]. Publications on fully integrated fuzzy-system chips, however, are relatively rare. One of these involves a digital fuzzy-controller [13].