We report a register transfer level technique for concurrent error detection and diagnosis in data dominated designs called Introspection. Introspection uses idle computation cyles in the data path and idle data transfer cycles in the interconnection network in a synergistic fashion for concurrent error detection and diagnosis (CEDD). The resulting on-chip fault latencies are one ten-thousandth (10 −4 ) of previously reported system level concurrent error detection and diagnosis latencies. The associated area overhead and performance penalty are negligible. We derive a cost function that considers introspection constraints such as (i) executing an operation on three disjoint function units for diagnosis and (ii) promoting function units to participate in at least one CEDD operation. We formulate integration of introspection constraints into the operation-to-operator binding phase of high-level synthesis as a weighted bipartite matching problem. The effectiveness of introspection and its implementation are illustrated on numerous industrial strength benchmarks.
To help address the need for manufacturing cycle time reduction, Intel has adopted an integrated operations management approach that consists of three key components: targeting, near real-time scheduling, and dispatching. These components work in conjunction to maximize fab efficiency. Combined with fully automated execution, this approach allows Intel to implement a coordinated operational management philosophy at its fabrication facilities. OPSched was developed at Intel to fulfill the requirements of the integrated approach. We look at why this approach is suitable for automated semiconductor manufacturing based on the implementation of the OPSched system at Intel's high-volume manufacturing facilities and the results achieved.
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