International audienceA new time-domain waveform measurement system based on the combination of an harmonic source and load-pull setup with a modified vector network analyzer (VNA) is presented. It allows the visualization, the measurement, and the optimization of high-frequency currents and voltages at both ports of nonlinear microwave devices. Measurements of GaAs field effect transistor (FET's) and GaInP/GaAs heterojunction bipolar transistor (HBT's) at L-band were performed to demonstrate the great capabilities of the system. On one hand, voltage and current waveforms at both ports of transistors, working as power amplifiers, were optimized for maximum power-added efficiency. On the other hand, time-domain waveforms of transistors operating as frequency multipliers were optimized for maximum conversion gain. Such results prove the capabilities offered by this new nonlinear time-domain measurement system to aid in designing optimized power amplifiers or frequency multipliers. They also provide valuable information for nonlinear transistor model validatio

No abstract

Two specific design methods of frequency multipliers are presented. The first one is CAD oriented and based on the "Substitute Generator Technique" using nonlinear device models. The second one is based on a novel time-domain load-pull setup to measure and optimize voltagekurrent waveforms at both ports of frequency multipliers. These complementary design approaches allow to quickly and accurately determine all the optimum operating conditions for any frequency multiplier. The first design methodology is applied to the optimization of a broadband (34.5-39)GHz PHEMT MMIC tripler integrated into a transceiver manufactured at the UMS foundry. In the same way, the time-domain loadpull characterization is applied to the optimization of a S-band HBT doubler.

A heterojunction bipolar transistor (HBT) technology utilizing InGaP/GaAs and carbondoped base has been established in Motorola's highvolume 6" GaAs facility. The technology has been used to develop an integrated dual band (824-849 MHz and 1850-1910 MHz) power amplifier IC with multi-mode operation for 2.5G portable wireless. Both three-stage amplifiers have 30 dB gain, and provide an EDGE (8-PSK) signal at 28 dBm, an NADC signal at 30 dBm, and a GMSK signal at 32 dBm in their respective frequency bands, using a single 3.5 V source. All matching elements external to the chip are included in a low cost epoxy substrate which is 9 x 12 x 1.6 mm3. Prospects of using this technology in W-CDMA applications have also been explored. A prototype achieves an ACPR of -41 dBc at 28 dBm output power with an efficiency of 36%.