In a recent paper, a novel approach was presented for the restoration of canonical signed-digit (CSD) numbers to their correct format after the application of crossover and mutation operations in genetic algorithms. This paper is concerned with the development of a new technique for the optimization of FIR digital filters over the CSD coefficient space based on genetic algorithms. This optimization technique exploits the aforementioned restoration of CSD numbers in conjunction with the conventional crossover and mutation operators in addition to a new local mutation oper-ator. The resulting technique is applicable not only to the global optimization of FIR digital filters, but also the conversion of digital filters with specified infinite-precision coefficients to their corresponding finite-precision CSD coefficients. An application example is given to illustrate the resulting technique.
<p class="MsoNormal" style="text-align: left; margin: 0cm 0cm 0pt; layout-grid-mode: char;" align="left"><span class="text"><span style="font-family: ";Arial";,";sans-serif";; font-size: 9pt;">It is well known that frequency response masking (FRM) FIR digital filters can be designed to exhibit very sharp-transition bands at the cost of slightly larger filter lengths as compared to the conventional FIR digital filters. The FRM FIR digital filters permit efficient hardware implementations due to an inherently large number of zerovalued multiplier coefficients in their transfer functions. The hardware complexity of these FIR digital filters can be further reduced by employing computationally efficient number systems for the representation of the constituent non-zero-valued multiplier coefficients. This paper presents a novel genetic algorithm for the design and discrete optimization of FRM FIR digital filters over the conventional canonical signed-digit (CSD) as well as the emerging double base number system (DBNS) multiplier coefficient spaces. This genetic algorithm is based on a pair of indexed look-up tables (LUTs) of permissible CSD/DBNS numbers whose indices form a closed set under the genetic algorithm operations of crossover and mutation. The CSD/DBNS values themselves permit pre-specified word-lengths and pre-specified number of non-zero bits. The salient feature of the proposed genetic algorithm is that it automatically leads to legitimate CSD/DBNS multiplier coefficients without any recourse to gene repair during optimization. The main features of the proposed genetic algorithm are demonstrated through its application to the design of a pair of low-pass and band-pass FRM FIR digital filters.</span></span><span style="font-family: ";Arial";,";sans-serif";; font-size: 9pt;"></span></p>
This paper is concerned with an overview of the salient features of combining the hitherto online and digit-serial arithmetic techniques for the design, development, and hardware implementation of algorithms for high-speed arithmetic operations. The online technique processes digital signals as generated and consumed by current practical analog-to-digital and digital-to-analog converters. The digit-serial technique permits a trade-off between speed and area in a corresponding hardware implementation. As online operations require redundant representations, carries do not propagate through long paths, thereby reducing the d e l a y in hardware implementation. Moreovel; the most significant digits of the result of an online operation can be fed as the inputs to other online operations after a small number of bit-serial clock cycles called latency. The area of online operations was a concern in the past, but one can now circumvent this problem by employing the digit-serial technique.signal processor to a digital-to-analog (D/A) converter. At a given time instant, one, several, or all of the digits of a word can be transmitted, i.e. in a bit-serial, digit-serial, or bit-parallel fashion, respectively. Of course, the bit-serial and bit-parallel fashions are subsumed by the digit-serial arithmetic technique. However, the digit-serial arithmetic technique itself can be derived from the bit-serial arithmetic technique. In addition, a bit-serial data stream can be processed, (a) the least-significant-digit (LSD) first, which is the case in the conventional arithmetic technique, or (b) the least-significant-digit (MSD) first, which is the case in the online arithmetic technique. The digit-serial and online arithmetic techniques are described in the following subsections.
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