The effect of allowing shared elements in interleaved thinned arrays is investigated. The sidelobe level (SLL) as a function of the number of shared elements mirrors the SLL of thinned arrays as a function of filling factor because the number of shared elements determines the filling factor of the subarrays. When the number of shared elements is small, the result is two subarrays on opposite sides of the aperture with only their ends being interleaved.
Abstract-This paper considers the synthesis of interleaved antenna arrays with shared and inactive elements. A hybrid genetic algorithm (GA) where the initial population is seeded with good solutions is proposed. A number of seeding schemes are considered and the most effective of these are identified. The proposed algorithm is shown to reliably produce results with sidelobe level (SLL) values which are close to the optimum and to converge faster than the other algorithms considered. However, some of the seeding schemes mislead the GA and actually produce worse results than random initialisation.
International audienceThis paper presents a new and efficient low-cost multi-layer 3D copper interconnect process for monolithic devices and passives. It relies on the BPN and SU-8 photoresists, associated with an optimized electroplating process to form multi-level 3D interconnects in a single metallization step. The SU-8 is used as a permanent thick dielectric layer which is patterned underneath specific locations to create the desired 3D interconnect shape. A 3D seed layer is deposited above the SU-8 and the substrate to insure 3D electroplating current flow. The BPN is used as a thick mold for copper electroplating with an aspect ratio as high as 16:1. An optimized 3D copper electroplating process is later used to grow 3D interconnects, insuring transition between all metallic layers. Finally, high-Q (55 @ 5 GHz) power inductors have been designed and integrated above a 50 W RF power LDMOS device, using this process
Abstract-A cost-effective technology is proposed for the integration of very compact and high-performance 3-D solenoid inductors. Based on a two metal level process, it involves a 3-D copper electroplating step for simultaneous integration of vertical and upper sections of coils. Several solenoids fabricated on a glass substrate and ranging from 2.3 nH to 9.5 nH are presented. The best performance is experimentally achieved by a 3-turn 3 nH inductor showing a maximum Q-factor of 58 at 5.6 GHz and a self-resonant frequency of 19 GHz. The best inductance density of 63 nH/mm 2 is reached by an 8-turn 9.5 nH solenoid.
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