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This paper presents a portable benchmark called IOStone that measures file system performance on a string of file system requests that is representative of measured system loads. Instead of isolating a particular aspect of file system performance such as disk access speed, or channel bandwidth, IOStone measures performance of the entire file system which includes components of disk performance, CPU performance on file system tasks, and disk cache performance, IOStone provides a basis for comparing performance of different file system implementations. It can also guide system builders in matching processor performance with file system performance. Measurements made using the IOStone benchmark indicate that a good balance between processor performance and file system performance is rarely achieved. Version II of the C language version of IOStone is available through electronic mail from becker@iris.ucdavis.edu.

This paper analyzes measurements of paging activity from several different versions of UNIX. We set out to characterize paging activity by first taking measurements of it, and then writing programs to analyze it. In doing so, we were interested in answering several questions:1. What is the magnitude of paging traffic and how much of I/O system activity is paging related?2. What are the characteristics of paging activity, and how can paging system implementations be tuned to match them?3. How does paging activity vary across different machines, operating systems, and job mixes?4. How well does paging activity correlate with system load average and number of users?

A r v i n P a r k a n d R o n M a e A b s t r a c tWe develop a coding scheme that reduces switching transients by limiting the number of lines that simultaneously switch during transmission of address and data information over the I/O pins of a VLSI chip, or the lines of a system bus. The maximum number of lines that simultaneously switch can be reduced by a factor of two using simple and fast circuitry for encoding and decoding. K e y w o r d s : Bus Design, Decoder, Encoder, I/0 Pins, Switching Transients, VLSI.