With the proliferation of ultra-high-speed mobile networks and internet-connected devices, along with the rise of artificial intelligence, the world is generating exponentially increasing amounts of data-data that needs to be processed in a fast, efficient and 'smart' way. These developments are pushing the limits of existing computing paradigms, and highly parallelized, fast and scalable hardware concepts are becoming progressively more important. Here, we demonstrate a computational specific integrated photonic tensor core-the optical analog of an ASIC-capable of operating at Tera-Multiply-Accumulate per second (TMAC/s) speeds. The photonic core achieves parallelized photonic inmemory computing using phase-change memory arrays and photonic chip-based optical frequency combs (soliton microcombs). The computation is reduced to measuring the optical transmission of reconfigurable and non-resonant, i.e. broadband, passive components operating at a bandwidth exceeding 14 GHz, limited only by the speed of the modulators and photodetectors. Given recent advances in hybrid integration of soliton microcombs at microwave line rates, ultra-low loss silicon nitride waveguides, and high speed on-chip detectors and modulators, our approach provides a path towards full CMOS wafer-scale integration of the photonic tensor core. While we focus on convolution processing, more generally our results indicate the major potential of integrated photonics for parallel, fast, efficient and wafer-scale manufacturable computational hardware in demanding AI applications such as autonomous driving, live video processing, and next generation cloud computing services.The increased demand for machine learning on very large datasets 1 and the growing offering of artificial intelligence services on the cloud 2-4 has driven a resurgence in custom hardware designed to accelerate multiply and accumulate (MAC) computations-the fundamental mathematical element needed for matrix-vector multiplication (MVM) operations. Whilst various custom silicon computing hardware (i.e. FPGAs 5 , ASICs 6 , and GPUs 7 ) have been developed to improve computational throughput and efficiency, they still depend on the same underlying electrical components which are fundamentally limited in both speed and energy by Joule heating, RF crosstalk, and capacitance 8 . The last of these (capacitance) dominates energy consumption and limits the maximum operating speeds in neural network hardware accelerators 9 since the movement of data (e.g. trained network weights), rather than arithmetic operations, requires the charging and discharging of chip-level metal interconnects. Thus, improving the efficiency of logic gates at the device level provides diminutive returns in such applications, if the flow of data during computation is not simultaneously addressed 10 . Even recent developments in the use of memristive crossbar arrays [11][12][13] to compute in the analog domain, whilst promising, do not have the potential for parallelizing the MVM operations (save for physically repli...

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Microcombs provide a path to broad-bandwidth integrated frequency combs with low power consumption, which are compatible with wafer-scale fabrication. Yet, electrically-driven, photonic chip-based microcombs are inhibited by the required high threshold power and the frequency agility of the laser for soliton initiation. Here we demonstrate an electrically-driven soliton microcomb by coupling a III–V-material-based (indium phosphide) multiple-longitudinal-mode laser diode chip to a high-Q silicon nitride microresonator fabricated using the photonic Damascene process. The laser diode is self-injection locked to the microresonator, which is accompanied by the narrowing of the laser linewidth, and the simultaneous formation of dissipative Kerr solitons. By tuning the laser diode current, we observe transitions from modulation instability, breather solitons, to single-soliton states. The system operating at an electronically-detectable sub-100-GHz mode spacing requires less than 1 Watt of electrical power, can fit in a volume of ca. 1 cm3, and does not require on-chip filters and heaters, thus simplifying the integrated microcomb.

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Low-loss photonic integrated circuits and microresonators have enabled a wide range of applications, such as narrow-linewidth lasers and chip-scale frequency combs. To translate these into a widespread technology, attaining ultralow optical losses with established foundry manufacturing is critical. Recent advances in integrated Si3N4 photonics have shown that ultralow-loss, dispersion-engineered microresonators with quality factors Q > 10 × 106 can be attained at die-level throughput. Yet, current fabrication techniques do not have sufficiently high yield and performance for existing and emerging applications, such as integrated travelling-wave parametric amplifiers that require meter-long photonic circuits. Here we demonstrate a fabrication technology that meets all requirements on wafer-level yield, performance and length scale. Photonic microresonators with a mean Q factor exceeding 30 × 106, corresponding to 1.0 dB m−1 optical loss, are obtained over full 4-inch wafers, as determined from a statistical analysis of tens of thousands of optical resonances, and confirmed via cavity ringdown with 19 ns photon storage time. The process operates over large areas with high yield, enabling 1-meter-long spiral waveguides with 2.4 dB m−1 loss in dies of only 5 × 5 mm2 size. Using a response measurement self-calibrated via the Kerr nonlinearity, we reveal that the intrinsic absorption-limited Q factor of our Si3N4 microresonators can exceed 2 × 108. This absorption loss is sufficiently low such that the Kerr nonlinearity dominates the microresonator’s response even in the audio frequency band. Transferring this Si3N4 technology to commercial foundries can significantly improve the performance and capabilities of integrated photonics.