Aerosol jet printing requires control of a number of process parameters, including the flow rate of the carrier gas that transports the aerosol mist to the substrate, the flow rate of the sheath gas that collimates the aerosol into a narrow beam, and the speed of the stage that transports the substrate beneath the beam. In this paper, the influence of process parameters on the geometry of aerosol-jet-printed silver lines is studied with the aim of creating high-resolution conductive lines of high current carrying capacity. A systematic study of process conditions revealed a key parameter: the ratio of the sheath gas flow rate to the carrier gas flow rate, defined here as the focusing ratio. Line width decreases with increasing the focusing ratio and stage speed. Simultaneously, the thickness increases with increasing the focusing ratio but decreases with increasing stage speed. Geometry control also influences the resistance per unit length and single pass printing of low-resistance silver lines is demonstrated. The results are used to develop an operability window and locate the regime for printing tall and narrow silver lines in a single pass. Under optimum conditions, lines as narrow as 20 μm with aspect ratios (thickness/width) greater than 0.1 are obtained.

Pristine graphene inks show great promise for flexible printed electronics due to their high electrical conductivity and robust mechanical, chemical, and environmental stability. While traditional liquid-phase printing methods can produce graphene patterns with a resolution of ∼30 μm, more precise techniques are required for improved device performance and integration density. A high-resolution transfer printing method is developed here capable of printing conductive graphene patterns on plastic with line width and spacing as small as 3.2 and 1 μm, respectively. The core of this method lies in the design of a graphene ink and its integration with a thermally robust mold that enables annealing at up to ∼250 °C for precise, high-performance graphene patterns. These patterns exhibit excellent electrical and mechanical properties, enabling favorable operation as electrodes in fully printed electrolyte-gated transistors and inverters with stable performance even following cyclic bending to a strain of 1%. The high resolution coupled with excellent control over the line edge roughness to below 25 nm enables aggressive scaling of transistor dimensions, offering a compelling route for the scalable manufacturing of flexible nanoelectronic devices.

to R2R manufacturing, making alignment of multiple layers of disparate materials with micrometer-level tolerances quite diffi cult to achieve on fast moving webs.To overcome these challenges, selfaligning strategies are needed that enable materials registration to be achieved automatically during R2R processes. One such strategy is self-aligned imprint lithography (SAIL), [8][9][10] where all the all key materials are coated onto a web substrate and then a top coat resist is applied. The resist is imprinted with a stamp encoded with geometrical information such that subsequent etching steps selectively reveal specifi c underlayers (metal, semiconductor, and dielectric) across the substrate. A major drawback of SAIL, however, is that it is a subtractive process, i.e., valuable materials are etched away. Selfaligned inkjet-printed patterns have also been obtained either by confi nement of ink droplets in a "bank" [ 11 ] or by dewetting on chemically patterned surfaces. [12][13][14][15] However, these processes are only partially self-aligned because they require micrometer-level registration of the inkjet nozzle to previously patterned features. Moreover, only a few selective layers of the device stack can be patterned using these techniques, not the entire device.Here, we report a new approach for printing multilayered electronic devices that is simultaneously self-aligned, additive, and scalable, which relies on capillary fl ow of electronically active inks within microchannels carefully engineered on the substrate surface. We term this process self-aligned capillarityassisted lithography for electronics (SCALE). In SCALE, multitier channels, each of which is connected to a separate reservoir, are molded into a coated thermoset material by imprint lithography. The dimensions of the channels range from a few micrometers to tens of micrometers and they are connected to larger reservoirs. Electronic inks are delivered to these reservoirs by "drop-on-demand" inkjet printing from which the liquid inks are wicked into the microchannels by capillarity. The process is self-aligned because multiple inks can be delivered sequentially to cavities engineered into a multilevel microchannel network to form, upon drying, multilayered electronic devices. Importantly, control over the printing process is only required at the size scale of the reservoir (≈hundreds of micrometers) rather than the size scale of the device. Specifi cally, we demonstrate that all the major multilayered electronic components of an integrated circuit, i.e., resistors, capacitors, transistors, and crossovers can be fabricated using the SCALE process.Printing is a promising route for high-throughput processing of electronic devices on large-area, fl exible substrates by virtue of its integration into rollto-roll production formats. However, multilayered electronic devices require materials registration with micrometer-level tolerances, which is a serious challenge for continuous manufacturing. Here, a novel, self-aligned manufacturing approach is introduc...

Printing electrically functional liquid inks is a promising approach for achieving low-cost, large-area, additive manufacturing of flexible electronic circuits. To print thin-film transistors, a basic building block of thin-film electronics, it is important to have several options for printable electrode materials that exhibit high conductivity, high stability, and low-cost. Here we report completely aerosol jet printed (AJP) p- and n-type electrolyte-gated transistors (EGTs) using a variety of different electrode materials including highly conductive metal nanoparticles (Ag), conducting polymers (polystyrenesulfonate doped poly(3,4-ethylendedioxythiophene, PEDOT:PSS), transparent conducting oxides (indium tin oxide), and carbon-based materials (reduced graphene oxide). Using these source-drain electrode materials and a PEDOT:PSS/ion gel gate stack, we demonstrated all-printed p- and n-type EGTs in combination with poly(3-hexythiophene) and ZnO semiconductors. All transistor components (including electrodes, semiconductors, and gate insulators) were printed by AJP. Both kinds of devices showed typical p- and n-type transistor characteristics, and exhibited both low-threshold voltages (<2 V) and high hole and electron mobilities. Our assessment suggests Ag electrodes may be the best option in terms of overall performance for both types of EGTs.