Supercapacitors are being increasingly used as energy storage systems. Graphene, with its huge specific surface area, superior mechanical flexibility and outstanding electrical properties, constitutes an ideal candidate for the next...

There is an urgent need to fulfill future energy demands for micro and nanoelectronics. This work outlines a number of important design features for carbon-based microsupercapacitors, which enhance both their performance and integration potential and are critical for complimentary metal oxide semiconductor (CMOS) compatibility. Based on these design features, we present CMOS-compatible, graphene-based microsupercapacitors that can be integrated at the back end of the line of the integrated circuit fabrication. Electrode materials and their interfaces play a crucial role for the device characteristics. As such, different carbon-based materials are discussed and the importance of careful design of current collector/electrode interfaces is emphasized. Electrode adhesion is an important factor to improve device performance and uniformity. Additionally, doping of the electrodes can greatly improve the energy density of the devices. As microsupercapacitors are engineered for targeted applications, device scaling is critically important, and we present the first steps toward general scaling trends. Last, we outline a potential future integration scheme for a complete microsystem on a chip, containing sensors, logic, power generation, power management, and power storage. Such a system would be self-powering.

On-chip micro-supercapacitors (MSCs), integrated with energy harvesters, hold substantial promise for developing self-powered wireless sensor systems. However, MSCs have conventionally been manufactured through techniques incompatible with semiconductor fabrication technology, the most significant bottleneck being the electrode deposition technique. Utilization of spin-coating for electrode deposition has shown potential to deliver several complementary metal−oxide−semiconductor (CMOS)-compatible MSCs on a silicon substrate. Yet, their limited electrochemical performance and yield over the substrate have remained challenges obstructing their subsequent integration. We report a facile surface roughening technique for improving the wafer yield and the electrochemical performance of CMOS-compatible MSCs, specifically for reduced graphene oxide as an electrode material. A 4 nm iron layer is deposited and annealed on the wafer substrate to increase the roughness of the surface. In comparison to standard nonroughened MSCs, the increase in surface roughness leads to a 78% increased electrode thickness, 21% improvement in mass retention, 57% improvement in the uniformity of the spin-coated electrodes, and a high yield of 87% working devices on a 2″ silicon substrate. Furthermore, these improvements directly translate to higher capacitive performance with enhanced rate capability, energy, and power density. This technique brings us one step closer to fully integrable CMOS-compatible MSCs in self-powered systems for on-chip wireless sensor electronics.