We introduce a simplified fabrication technique for Josephson junctions and demonstrate superconducting Xmon qubits with T 1 relaxation times averaging above 50 ls (Q > 1:5 Â 10 6 ). Current shadow-evaporation techniques for aluminum-based Josephson junctions require a separate lithography step to deposit a patch that makes a galvanic, superconducting connection between the junction electrodes and the circuit wiring layer. The patch connection eliminates parasitic junctions, which otherwise contribute significantly to dielectric loss. In our patch-integrated cross-type junction technique, we use one lithography step and one vacuum cycle to evaporate both the junction electrodes and the patch. This eliminates a key bottleneck in manufacturing superconducting qubits by reducing the fabrication time and cost. In a study of more than 3600 junctions, we show an average resistance variation of 3.7% on a wafer that contains forty 0:5 Â 0:5-cm 2 chips, with junction areas ranging between 0.01 and 0.16 lm 2 . The average on-chip spread in resistance is 2.7%, with 20 chips varying between 1.4% and 2%. For the junction sizes used for transmon qubits, we deduce a wafer-level transition-frequency variation of 1.7%-2.5%. We show that 60%-70% of this variation is attributed to junction-area fluctuations, while the rest is caused by tunnel-junction inhomogeneity. Such high frequency predictability is a requirement for scaling-up the number of qubits in a quantum computer.
We have integrated single and coupled superconducting transmon qubits into flip-chip modules. Each module consists of two chips - one quantum chip and one control chip - that are bump-bonded together. We demonstrate time-averaged coherence times exceeding 90μs, single-qubit gate fidelities exceeding 99.9%, and two-qubit gate fidelities above 98.6%. We also present device design methods and discuss the sensitivity of device parameters to variation in interchip spacing. Notably, the additional flip-chip fabrication steps do not degrade the qubit performance compared to our baseline state-of-the-art in single-chip, planar circuits. This integration technique can be extended to the realisation of quantum processors accommodating hundreds of qubits in one module as it offers adequate input/output wiring access to all qubits and couplers.
Decoherence and gate errors severely limit the capabilities
of
state-of-the-art quantum computers. This work introduces a strategy
for reference-state error mitigation (REM) of quantum chemistry that
can be straightforwardly implemented on current and near-term devices.
REM can be applied alongside existing mitigation procedures, while
requiring minimal postprocessing and only one or no additional measurements.
The approach is agnostic to the underlying quantum mechanical ansatz
and is designed for the variational quantum eigensolver. Up to two
orders-of-magnitude improvement in the computational accuracy of ground
state energies of small molecules (H2, HeH+,
and LiH) is demonstrated on superconducting quantum hardware. Simulations
of noisy circuits with a depth exceeding 1000 two-qubit gates are
used to demonstrate the scalability of the method.
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