This paper proposes a model driven approach for the schedulability analysis at an early stage of the embedded system development life-cycle. The activity diagram of Unified Modeling Language (UML) annotated with the profile for the Modeling and Analysis of Real-Time and Embedded systems (MARTE) is mapped into Priority Time Petri Net (PTPN) to enhance formal schedulability test of given real time tasks. The generated PTPN model is interpreted and executed to check whether a schedule of a task execution meets the imposed timing constraints. Therefore, the present paper focuses on the definition of temporal properties and tasks dependency by means of activity diagram and MARTE profile. Besides, it describes the transformation rules from analysis model to formal model.
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